QPSK调制与解调模块

电子通信论文编号:TX205 附原理图及PCB,程序,论文字数:20215,页数:39

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目    录

引言………………………………………………………………………1
1 设计方案 ……………………………………………………………１
2 锁相环频率合成设计…………………………………………………2
3 调制解调模块设计…………………………………………………19
4  序列信号发生电路…………………………………………………30
5  电源设计……………………………………………………………31
6　软件设计…………………………………………………………32
7　测试方法和改进……………………………………………………35
8　结论………………………………………………………………37
谢辞……………………………………………………………………38
参考文献………………………………………………………………39

摘   要

四相相移键控信号简称“QPSK”,这种调制方式由于抗干扰能力强、频带利用率高等特点，得到广泛的应用，比如微波、卫星通信系统、宽带接入与移动通信等，现成为现代通信中的一种十分重要的调制解调方式。
琐相环路是一个能够跟踪输入信号相位的闭环自动控制系统，它广泛应用于广播通信、频率合成、自动控制及时钟同步等技术领域。锁相环主要由相位比较器（PC）、压控振荡器（VCO）、低通滤波器(LP)三部分组成。PLL具有载波跟踪特性；调制跟踪特性；高精度的相位和频率测量；用高稳定的参考振荡器锁定，可作提供一系列频率高稳定的频率源等特点，现已出现了各种数字锁相环路，在数字信号传输方面起到了重要作用。
本课题的设计任务是实现QPSK的调制与解调，频率范围为35MHz-70MHz。在本设计中着重介绍了QPSK的调制、解调原理以及实现调制解调所需要的载波的具体实现方法：根据锁相环路可提供高稳定的频率源，在设计中采用锁相频率合成得到稳定的调制解调所需的载波；采用数字集成正交调制解调芯片实现QPSK的调制与解调。在论文中详细阐述了相位调制的调制解调原理、琐相环频率合成的原理以及分别的实现的电路设计和调试方法。

关键字：四相相移键控；锁相环；频率合成；调制；解调

 Abstract

 Quaternary Phase Shift Keying is short for QPSK, this modulation method  gets an extensive application,because its anti-interference ability is superior to many others,and the wave band is taken good advantage of,an so on.It is used
in many domains ,such as microwave and Satellite communication system ,theconnect into the wideband,Mobile communication system. nowadays QPSK has become a more important way of modulation and demodulation in modem co-mmunication system .
The phase locking loop (PLL ) is a automatic control system that can foll-ow closing the phase of the input signal .It applies to technological fields , s-uch as broadcast communication , frequency formating ,Automaticallying controland clock synchronization ,etc. extensively.the phase locking cycle is made up of three part:Phase Distinction (PD),Voltage-Controlled Oscillator (VCO ),Lowpass Filter (LP ).the PLL has the character of tracking carrier and modulation ,and it can be used to measure the phase and frequency precisely,and whena high stable standard scillator is set to be locked,it can supply a series of high stabl-e frequency.now many kind of digital PLL,it play a important roles in the tra-nsmission of digital signal .
  This  design assignment is to realize the modulation and demodulation of  QPSK in the frequency range from 35MHz to 70MHz.in this thesis ,it emphas-izes  on the method access to the QPSK modulation and demodulation ,and h-ow to get the carrier that the modulation and demodulation needed.I use a mo-nolithic IC of quadrature modulator and demodulator to realize the QPSK mod-ulation and demodulation.according to the PLL’s character of supplying high st-able frequency signals,in this design,we get the stable carrier by the Phaselock-ed Frequency Multiplier.in the following words,you can see the details of the  principle of modulation,demodulation and the the Phase-locked Frequency Mult-iplier,and the methods of ectronic circuit design for the three.

Keywords: Quaternary Phase Shift Keying(QPSK);PLL; modulation; dem-odulation; Phase-locked Frequency Multiplier