Digital multiplexing technology is a digital communications network based on a technology. When the 80's years of the 20th century it have become more mature, and it is not only the technical expertise along with a source coding, digital transmission, digital switching, but also the division basis of the use in the frame synchronization network adjustment, line concentrator reuse of lines and digital switching follow-up of technologies such as time. A digital multiplexer is made up with the digital multiplexer system, the digital distribution and the transmission channel . In this paper, it’s a digital multiplexer system based on FPGA technology to achieve a system of the four-way synchronization system design Demultiplexer which is design simpler and more representative . The mainly useful of Digital Demultiplexer will be that the signal ,which had been multiplexered by the digital multiplexer and after it transmission through the signals channel and reach the receiving , access the operation of demultiplexing, the signal will be reduction. The design used the Max + plusII design simulation software . Relative VHDL text input method, experimental schematic used to complete the design input to improve the efficiency of the design. To date, people unusually use FPGA to achieve the Digital multiplexing technology design, so the design of the significance have its design and research value.
Keywords: Digital Demultiplexer , VHDL, Max+plusII
