电子测频仪--毕业设计

电子机电论文编号:JD025    字数:15138,页数:56

目  录
摘    要................................................................... i
目    录..................................................................  ii
第1章 绪    论 ............................................................ 1
第2章电子测频仪的设计原理................................................  5
2.1 电子测频仪的基本组成 .................................................. 5
2.2 电子测频仪的分类........................................................6
2.4电子测频仪的基本工作原理...............................................  6
2.5电子测频仪技术指标及误差分析...........................................  8
第3章   CPLD简介 ......................................................... .10
3.1 CPLD器件结构简介....................................................... 10
3.2典型CPLD器件简述 ....................................................... 12
3.3 CPLD的编程工艺..........................................................14
3.4新技术的应用 ............................................................15
第4章电子测频仪设计环境简介...................................  ...........17
4.1 Quartus Ⅱ开发软件简介 .................................................17
4.1.1 图形用户界面设计流程 .......................................... ......18
4.1.2 EDA工具设计流程 ..................................................... 18
4.1.3 Quartus Ⅱ软件的主要设计特性..........................................18
第5章电子测频仪的设计 .............................................. ......21
5.1 电子测频仪设计任务及要求................................................21
5.2 设计实现 .............................................................. 21
5.3 功能模块设计 ...........................................................23
5.4 下面分别介绍各模块基于VHDL的设计方法................................... 23
5.5 顶层文件的编写........................................................  41
5.6程序说明 ............................................................... 44
5.7系统仿真 ............................................................... 44
第6章  结    论 ........................................................... 46
致    谢 .................................................................. 47
参 考 文献 ............................................................... 48

摘  要
    电子测频仪是一种基本的测量仪器，是用数字显示被测信号频率的仪器，被测信号可以是正弦波，方波或其它周期性变化的信号。因此，它被广泛应用与航天、电子、测控等领域。它的基本测量原理是，首先让被测信号与标准信号一起通过一个闸门，然后用计数器计数信号脉冲的个数，把标准时间内的计数的结果，用锁存器锁存起来，最后用显示译码器，把锁存的结果用LED数码显示管显示出来。根据数字频率计的基本原理，本文设计方案的基本思想是分为五个模块来实现其功能，即整个数字频率计系统分为分频模块、防抖电路、计数模块、锁存器模块和显示模块等几个单元，并且分别用VHDL对其进行编程，实现了闸门控制信号、计数电路、锁存电路、位选电路、段选电路、显示电路等。本文详细论述了利用VHDL硬件描述语言设计，并在EDA（电子设计自动化）工具的帮助下，用大规模可编程器件（CPLD）实现数字频率计的设计原理及相关程序。该设计方案对其中部分元件进行编程，实现了闸门控制信号、多路选择电路、计数电路、位选电路、段选电路等。频率计的测频范围：10KHz~9.9MHz。该设计方案通过了Max+plus Ⅱ软件仿真、硬件调试和软硬件综合测试。

关键词：数字频率计  电子设计自动化 大规模可编程器件 硬件描述语言

Abstract

The electronic frequency measurement meter is one kind of basic metering equipment, is with the digit demonstrated that was measured the signaling frequency the instrument, was measured the signal may be the sine wave, the square-wave or other periodic variation signal. Therefore, it is widely applied and domains and so on astronautics, electron, observation. Its preliminary survey principle is, first lets measure that the signal and the standard signal through a strobe, then with the counter counting signal pulse's integer, standard time's in counting's result, save together with the latch lock, finally uses to demonstrate the decoder, saves the result the lock to demonstrate with the LED numerical code display tube. According to the digital frequency meter's basic principle, this article design proposal's basic philosophy is divides into five modules to realize its function, namely the entire digital frequency meter system divides into the frequency division module, against to shake the electric circuit, the counting module, the latch module and the display module and so on several units, and uses VHDL to carry on the programming separately to it, realized the strobe control signal, the counting circuit, the lock to save the electric circuit, the position to choose the electric circuit, the section to choose the electric circuit, the display circuit and so on. This article elaborated in detail has used the VHDL hardware description language design, and in EDA (electronic design automation) under tool's help, (CPLD) realized the digital frequency meter's principle of design and the dependent program with the large-scale programmable component. This design proposal to the partial parts carries on the programming, realized the strobe control signal, the multi-channel selecting circuits, the counting circuit, the position to choose the electric circuit, the section to choose the electric circuit and so on. Frequency meter's frequency measurement scope: 10KHz~9.9MHz. This design proposal passed Max+plus ⅡSoftware simulation, hardware debug and software and hardware line-up test.

key word: Digital frequency meter electron design automation large-scale programmable component hardware description language